Heat dissipation in a semiconductor chip is a major challenge to scaling of semiconductor devices because the power density, which is the product of areal device density and power consumption per device, of the semiconductor chip increases as the average area of the semiconductor decreases. Managing heat dissipation in a bonded semiconductor substrate, in which at least two semiconductor substrates each containing semiconductor devices are bonded, becomes even more problematic because the vertical stacking of the at least two semiconductor substrates further increases power dissipater per unit area.
While prior art methods provide methods of cooling a single semiconductor chip such as attaching a heat sink to the semiconductor chip and forming a cooling structure within a substrate, such methods require many processing steps for the manufacture of the cooling structure or provide inadequate cooling. Particularly, prior art methods do not provide inexpensive and effective cooling mechanisms for a bonded semiconductor substrate, within which heat is generated by semiconductor devices in at least two semiconductor substrates.
In view of the above, there exists a need for a method for providing a cooling mechanism for a bonded semiconductor substrate in an inexpensive and effective manner.